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this is information on a product in full production. april 2014 docid024568 rev 4 1/31 TSX9291, tsx9292 16 mhz rail-to-rail cmos 16 v operational amplifiers datasheet - production data features ? rail-to-rail input and output ? wide supply voltage: 4 v - 16 v ? gain bandwidth product: 16 mhz typ at 16 v ? low power consumption: 2.8 ma typ at 16 v ? slew rate: 27 v/ s ? stable when used in gain configuration ? low input bias current: 10 pa typ ? high tolerance to esd: 4 kv hbm ? extended temperature range: -40 c to +125 c ? automotive qualification related products ? see the tsx5 series for low power features ? see the tsx6 series for micro power features ? see the tsx92 series for unity gain stability ? see the tsv9 series for lower voltage applications ? communications ? process control ? active filtering ? test equipment description the TSX9291 and tsx9292 operational amplifiers (op-amps) offer excellent ac characteristics such as 16 mhz gain bandwidth, 27 v/ s slew rate, and 0.0003 % thd+n. they are decompensated amplifiers which are stable when used with a gain higher than 2 or lower than -1. the rail-to-rail input and output capability of these devices operates on a wide supply voltage range of 4 v to 16 v. these last two features make the tsx929x series particularly well- adapted for a wide range of applications such as communications, i/v amp lifiers for adcs, and active filtering applications. 62776; ')1[76; 6276; 0lql6276; table 1. device summary single dual op-amp version TSX9291 tsx9292 www.st.com
contents TSX9291, tsx9292 2/31 docid024568 rev 4 contents 1 package pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 absolute maximum ratings and operating c onditions . . . . . . . . . . . . . 4 3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.1 operating voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.2 rail-to-rail input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.3 input pin voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.4 stability for gain = -1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.5 input offset voltage drift over temperature . . . . . . . . . . . . . . . . . . . . . . . . 19 4.6 long-term input offset voltage drift . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.7 capacitive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.8 high side current sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4.9 high speed photodiode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.1 sot23-5 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5.2 dfn8 2x2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.3 miniso8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 5.4 so8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 6 ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 7 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
docid024568 rev 4 3/31 TSX9291, tsx9292 package pin connections 31 1 package pin connections figure 1. pin connections (top view) sot23-5 (TSX9291) 9&& ,1 287 9&& ,1 9&& 9&& 287 ,1 ,1 287 ,1 ,1 miniso8/so8 (tsx9292) dfn8 2x2 (tsx9292) 9&& 9&& 287 ,1 ,1 287 ,1 ,1
absolute maximum ratings and operating conditions TSX9291, tsx9292 4/31 docid024568 rev 4 2 absolute maximum ratings and operating conditions table 2. absolute maximum ratings (amr) symbol parameter value unit v cc supply voltage (1) 1. all voltage values, except the differential volt age are with respect to network ground terminal. 18 v v id differential input voltage (2) 2. the differential voltage is the non-inverting input term inal with respect to the inverting input terminal. v cc mv v in input voltage v cc- - 0.2 to v cc+ + 0.2 v i in input current (3) 3. input current must be limited by a resistor in series with the inputs. 10 ma t stg storage temperature -65 to +150 c r thja thermal resistance junction to ambient (4)(5) sot23-5 dfn8 2x2 miniso8 so8 4. short-circuits can c ause excessive heating and destructive dissipation. 5. r th are typical values. 250 57 190 125 c/w t j maximum junction temperature 150 c esd hbm: human body model (6) 6. according to jedec standard jesd22-a114f 4000 v mm: machine model (7) 7. according to jedec standard jesd22-a115a 100 cdm: charged device model (8) 8. according to ansi/esd stm5.3.1 1500 latch-up immunity 200 ma table 3. operating conditions symbol parameter value unit v cc supply voltage 4 to 16 v v icm common mode input voltage range v cc- - 0.1 to v cc+ + 0.1 t oper operating free air temperature range -40 to +125 c
docid024568 rev 4 5/31 TSX9291, tsx9292 electrical characteristics 31 3 electrical characteristics table 4. electrical characteristics at v cc+ = +4.5 v with v cc- = 0 v, v icm = v cc /2, t amb = 25 c, and r l = 10 k connected to v cc /2 (unless otherwise specified) symbol parameter conditions min. typ. max. unit v io input offset voltage v icm = 2 v t min < t op < t max 4 5 mv v io / t input offset voltage drift 2 10 v/c v io long-term input offset voltage drift (1)(2) TSX9291 tsx9292 6 9 i ib input bias current v out = v cc /2 t min < t op < t max 10 100 200 pa i io input offset current v out = v cc /2 t min < t op < t max 10 100 200 r in input resistance 1 t c in input capacitance 8 pf cmr common mode rejection ratio 20 log ( v ic / v io ) v icm = -0.1 v to 2 v, v out = v cc /2 t min < t op < t max v icm = -0.1 v to 4.6 v, v out = v cc /2 t min < t op < t max 61 59 59 57 82 72 db a vd large signal voltage gain r l = 2 k , v out = 0.3 v to 4.2 v t min < t op < t max r l = 10 k , v out = 0.2 v to 4.3 v t min < t op < t max 100 90 100 90 108 112 v oh high level output voltage r l = 2 k to v cc /2 t min < t op < t max r l = 10 k to v cc /2 t min < t op < t max 50 10 80 100 16 20 mv from v cc + v ol low level output voltage r l = 2 k to v cc /2 t min < t op < t max r l = 10 k to v cc /2 t min < t op < t max 42 9 80 100 16 20 mv i out i sink v out = 4.5 v t min < t op < t max 16 13 21 ma i source v out = 0 v t min < t op < t max 16 13 21 i cc supply current (per amplifier) no load, v out = v cc /2 t min < t op < t max 2.9 3.4 3.5 gbp gain bandwidth product r l = 10 k , c l = 20 pf, g = 20 db 15.6 mhz f u unity gain frequency r l = 10 k , c l = 20 pf 14.2 nv month ---------------------------
electrical characteristics TSX9291, tsx9292 6/31 docid024568 rev 4 gain minimum gain for stability phase margin = 60 , r g = r f = 1 k r l = 10 k , c l = 20 pf -1 +2 sr+ positive slew rate av = +1, v out = 0.5 to 4.0 v measured between 10 % to 90 % 27 v/ s sr- negative slew rate av = +1, v out = 4.0 to 0.5 v measured between 90 % to 10 % 22 e n equivalent input noise voltage f = 10 khz f = 100 khz 17.9 12.9 e n low-frequency peak-to- peak input noise bandwidth: f = 0.1 to 10 hz 8.1 v pp thd+n total harmonic distortion + noise f = 1 khz, av = +1, r l = 10 k , v out = 2 v rms 0.002 % 1. typical value is based on the vio drift observed after 100 0h at 125c extrapolated to 25c using the arrhenius law and assuming an activation energy of 0.7 ev. the operational amplifier is aged in follower mode configuration. see section 4.6: long-term input offset voltage drift . 2. when used in comparator mode, with high differentia l input voltage, during a long period of time with v cc close to 16v and v icm >v cc /2, vio can experience a permanent drift of few mv drift. the phenomenon is particularly worsen at low temperatures. table 4. electrical characteristics at v cc+ = +4.5 v with v cc- = 0 v, v icm = v cc /2, t amb = 25 c, and r l = 10 k connected to v cc /2 (unless otherwise sp ecified) (continued) symbol parameter conditions min. typ. max. unit nv hz ----------- -
docid024568 rev 4 7/31 TSX9291, tsx9292 electrical characteristics 31 table 5. electrical ch aracteristics at v cc+ = +10 v with v cc- = 0 v, v icm = v cc /2, t amb = 25 c, and r l = 10 k connected to v cc /2 (unless otherwise specified) symbol parameter conditions min. typ. max. unit v io input offset voltage t min < t op < t max 4 5 mv v io / t input offset voltage drift 2 10 v/c v io long-term input offset voltage drift (1) (2) TSX9291 tsx9292 92 128 i ib input bias current v out = v cc /2 t min < t op < t max 10 100 200 pa i io input offset current v out = v cc /2 t min < t op < t max 10 100 200 r in input resistance 1 t c in input capacitance 8 pf cmr common mode rejection ratio 20 log ( v ic / v io ) v icm = -0.1 v to 7 v, v out = v cc /2 t min < t op < t max v icm = -0.1 v to 10.1 v, v out = v cc /2 t min < t op < t max 72 70 64 62 85 75 db a vd large signal voltage gain r l = 2 k , v out = 0.3 v to 9.7 v t min < t op < t max r l = 10 k , v out = 0.2 v to 9.8 v t min < t op < t max 100 90 100 90 107 117 v oh high level output voltage r l = 2 k to v cc /2 t min < t op < t max r l = 10 k to v cc /2 t min < t op < t max 94 31 110 130 40 50 mv from v cc+ v ol low level output voltage r l = 2 k to v cc /2 t min < t op < t max r l = 10 k to v cc /2 t min < t op < t max 80 14 110 130 40 50 mv i out i sink v out = 10 v t min < t op < t max 50 42 55 ma i source v out = 0 v t min < t op < t max 75 70 82 i cc supply current (per amplifier) no load, v out = v cc /2 t min < t op < t max 3.1 3.6 3.6 gbp gain bandwidth product r l = 10 k , c l = 20 pf, g = 20 db 16 mhz f u unity gain frequency r l = 10 k , c l = 20 pf 15.4 gain minimum gain for stability phase margin = 60 , r g = r f = 1 k r l = 10 k , c l = 20 pf -1 +2 nv month ---------------------------
electrical characteristics TSX9291, tsx9292 8/31 docid024568 rev 4 sr+ positive slew rate av = +1, v out = 0.5 to 9.5 v measured between 10 % to 90 % 29 v/ s sr- negative slew rate av = +1, v out = 9.5 to 0.5 v measured between 90 % to 10 % 30 e n equivalent input noise voltage f = 10 khz f = 100 khz 16.8 12 e n low-frequency peak-to- peak input noise bandwidth: f = 0.1 to 10 hz 8.64 v pp thd+n total harmonic distortion + noise f = 1 khz, av = +1, r l = 10 k , v out = 2 v rms 0.0006 % 1. typical value is based on the vio drift observed after 100 0h at 125c extrapolated to 25c using the arrhenius law and assuming an activation energy of 0.7 ev. the operational amplifier is aged in follower mode configuration. see section 4.6: long-term input offset voltage drift . 2. when used in comparator mode, with high differentia l input voltage, during a long period of time with v cc close to 16v and v icm >v cc /2, vio can experience a permanent drift of few mv drift. the phenomenon is particularly worsen at low temperatures. table 5. electrical ch aracteristics at v cc+ = +10 v with v cc- = 0 v, v icm = v cc /2, t amb = 25 c, and r l = 10 k connected to v cc /2 (unless otherwise specified) (continued) symbol parameter conditions min. typ. max. unit nv hz ----------- -
docid024568 rev 4 9/31 TSX9291, tsx9292 electrical characteristics 31 table 6. electrical ch aracteristics at v cc+ = +16 v with v cc- = 0 v, v icm = v cc /2, t amb = 25 c, and r l = 10 k connected to v cc /2 (unless otherwise specified) symbol parameter conditions min. typ. max. unit v io input offset voltage t min < t op < t max 4 5 mv v io / t input offset voltage drift 2 10 v/c v io long-term input offset voltage drift (1) (2) TSX9291 tsx9292 1.73 2.26 i ib input bias current v out = v cc /2 t min < t op < t max 10 100 200 pa i io input offset current v out = v cc /2 t min < t op < t max 10 100 200 r in input resistance 1 t c in input capacitance 8 pf cmr common mode rejection ratio 20 log ( v ic / v io ) v icm = -0.1 v to 13 v, v out = v cc /2 t min < t op < t max v icm = -0.1 v to 16.1 v, v out = v cc /2 t min < t op < t max 73 71 67 65 85 76 db svr supply voltage rejection ratio v cc = 4.5 v to 16 v t min < t op < t max 73 71 85 a vd large signal voltage gain r l = 2 k , v out = 0.3 v to 15.7 v t min < t op < t max r l = 10 k , v out = 0.2 v to 15.8 v t min < t op < t max 100 90 100 90 105 113 v oh high level output voltage r l = 2 k to v cc /2 t min < t op < t max r l = 10 k to v cc /2 t min < t op < t max 150 43 200 230 50 70 mv from v cc+ v ol low level output voltage r l = 2 k to v cc /2 t min < t op < t max r l = 10 k to v cc /2 t min < t op < t max 140 30 200 230 50 70 mv i out i sink v out = 16 v t min < t op < t max 45 40 50 ma i source v out = 0 v t min < t op < t max 65 60 74 i cc supply current (per amplifier) no load, v out = v cc /2 t min < t op < t max 2.8 3.4 3.4 gbp gain bandwidth product r l = 10 k , c l = 20 pf, g = 20 db 16 mhz f u unity gain frequency r l = 10 k , c l = 20 pf 15.7 v month ---------------------------
electrical characteristics TSX9291, tsx9292 10/31 docid024568 rev 4 gain minimum gain for stability phase margin = 60 , r g = r f = 1 k r l = 10 k , c l = 20 pf -1 +2 sr+ positive slew rate av = +1, v out = 0.5 to 15.5 v measured between 10 % to 90 % 26 v/ s sr- negative slew rate av = +1, v out = 15.5 to 0.5 v measured between 90 % to 10 % 27 e n equivalent input noise voltage f = 10 khz f = 100 khz 16.5 11.8 e n low-frequency peak-to- peak input noise bandwidth: f = 0.1 to 10 hz 8.58 v pp thd+n total harmonic distortion + noise f = 1 khz, av = +1, r l = 10 k , v out = 4v rms 0.0003 % t s settling time gain = +1, 100 mv input voltage 0.1 % of final value 1 % of final value 245 178 ns 1. typical value is based on the vio drift observed after 100 0h at 125c extrapolated to 25c using the arrhenius law and assuming an activation energy of 0.7 ev. the operational amplifier is aged in follower mode configuration. see section 4.6: long-term input offset voltage drift . 2. when used in comparator mode, with high differentia l input voltage, during a long period of time with v cc close to 16v and v icm >v cc /2, vio can experience a permanent drift of few mv drift. the phenomenon is particularly worsen at low temperatures. table 6. electrical ch aracteristics at v cc+ = +16 v with v cc- = 0 v, v icm = v cc /2, t amb = 25 c, and r l = 10 k connected to v cc /2 (unless otherwise specified) (continued) symbol parameter conditions min. typ. max. unit nv hz ----------- -
docid024568 rev 4 11/31 TSX9291, tsx9292 electrical characteristics 31 figure 2. supply current vs. supply voltage figure 3. distribution of input offset voltage at v cc = 4.5 v 0.0 0.0 2.0 4.0 4.0 6.0 8.0 8.0 10.0 12.0 12.0 14.0 16.0 16.0 0.0 0.0 0.6 1.2 1.2 1.8 2.4 2.4 3.0 3.6 3.6 t=-40c v icm =v cc /2 t=125c t=25c supply current (ma) supply voltage (v) - 3 - 2 - 1 0 1 2 3 05 1 0 1 5 2 0 2 5 3 0 d i s t r i b u t i o n o f v i o v c c = 4 . 5 v , v i c m = 2 . 2 5 v p o p u l a t i o n % i n p u t o f f s e t v o l t a g e m v figure 4. distribution of input offset voltage at v cc = 16 v figure 5. input offset voltage vs. temperature at v cc = 16 v - 3 - 2 - 1 0 1 2 3 05 1 0 1 5 2 0 2 5 3 0 d i s t r i b u t i o n o f v i o v c c = 1 6 v , v i c m = 8 v p o p u l a t i o n % i n p u t o f f s e t v o l t a g e m v -40 -40 -20 -20 0 020 20 40 40 60 60 80 80 100 100 120 120 -5 -5 -3 0 0 3 5 5 vcc=16v, vicm=8v input offset voltage (mv) temperature (c) figure 6. distribution of input offset voltage drift over temperature figure 7. input offset voltage vs. common mode voltage at v cc = 4 v - 7 - 6 - 5 - 4 - 3 - 2 - 1 0 05 1 0 1 5 2 0 2 5 v i o / t v c c = 1 6 v , v i c m = 8 v p o p u l a t i o n % v i o / t v / c 0.0 0.0 0.3 0.5 0.5 0.8 1.0 1.0 1.3 1.5 1.5 1.8 2.0 2.0 2.3 2.5 2.5 2.8 3.0 3.0 3.3 3.5 3.5 3.8 4.0 4.0 -2.0 -2.0 -1.8 -1.5 -1.5 -1.3 -1.0 -1.0 -0.8 -0.5 -0.5 -0.3 0.0 0.0 0.3 0.5 0.5 0.8 1.0 1.0 t=25c t=-40c t=125c vcc=4v input offset voltage (mv) common mode voltage(v)
electrical characteristics TSX9291, tsx9292 12/31 docid024568 rev 4 figure 8. input offset voltage vs. common mode voltage at v cc = 16 v figure 9. output current vs. output voltage at v cc = 4 v 0.0 0.0 1.5 3.0 3.0 4.5 6.0 6.0 7.5 9.0 9.0 10.5 12.0 12.0 13.5 15.0 15.0 -3.0 -2.4 -2.4 -1.8 -1.2 -1.2 -0.6 0.0 0.0 0.6 1.2 1.2 1.8 t=25c t=-40c t=125c vcc=16v input offset voltage (mv) common mode voltage(v) 0.0 0.0 0.5 1.0 1.0 1.5 2.0 2.0 2.5 3.0 3.0 3.5 4.0 4.0 -30 -20 -20 -10 0 0 10 20 20 30 vcc=4v t=-40c t=25c sink vid=-1v t=125c source vid=1v output current (ma) output voltage (v) figure 10. output current vs. output voltage at v cc = 10 v figure 11. output current vs. output voltage at v cc = 16 v 0.0 0.0 1.0 2.0 2.0 3.0 4.0 4.0 5.0 6.0 6.0 7.0 8.0 8.0 9.0 10.0 10.0 -75 -50 -50 -25 0 0 25 50 50 vcc=10v t=-40c t=25c sink vid=-1v t=125c source vid=1v output current (ma) output voltage (v) 0.0 0.0 2.5 5.0 5.0 7.5 10.0 10.0 12.5 15.0 15.0 -75 -50 -50 -25 0 0 25 50 50 vcc=16v t=-40c t=25c sink vid=-1v t=125c source vid=1v output current (ma) output voltage (v) figure 12. output rail linearity figure 13. open loop gain vs. frequency 0.0 0.0 0.1 0.1 0.2 0.2 0.3 0.3 0.4 0.4 0.5 0.5 7.4 7.4 7.5 7.5 7.6 7.6 7.7 7.7 7.8 7.8 7.9 7.9 8.0 8.0 0.0 0.0 0.2 0.2 0.4 0.4 0.6 0.6 0.8 0.8 1.0 1.0 14.8 14.8 15.0 15.0 15.2 15.2 15.4 15.4 15.6 15.6 15.8 15.8 16.0 16.0 rl=10k vcc=16v g=2 t=25c rl=2k output voltage (v) input voltage (v) 0.01 0.1 1 10 100 1000 10000 -40 -20 0 20 40 60 80 100 120 140 -360 -320 -280 -240 -200 -160 -120 -80 -40 0 40 80 120 160 200 240 280 320 360 gain (db) frequency (khz) gain phase vcc=16v, vicm=8v, rl=10k , cl=20pf, vrl=vcc/2 phase ()
docid024568 rev 4 13/31 TSX9291, tsx9292 electrical characteristics 31 figure 14. bode diagra m vs. temperature for v cc = 4 v figure 15. bode diagram vs. temperature for v cc = 10 v 1 10 100 1000 10000 -40 -20 0 20 40 -250 -200 -150 -100 -50 0 50 100 150 200 250 gain (db) frequency (khz) gain phase vcc=4v, vicm=2v, g=100 rl=10k , cl=20pf, vrl=vcc/2 t=125c t=-40c t=25c phase () 1 10 100 1000 10000 -40 -20 0 20 40 -250 -200 -150 -100 -50 0 50 100 150 200 250 gain (db) frequency (khz) gain phase vcc=10v, vicm=5v, g=100 rl=10k , cl=20pf, vrl=vcc/2 t=125c t=-40c t=25c phase () figure 16. bode diagra m vs. temperature for v cc = 16 v figure 17. bode diagram at v cc = 16 v with low common mode voltage 1 10 100 1000 10000 -40 -20 0 20 40 -250 -200 -150 -100 -50 0 50 100 150 200 250 gain (db) frequency (khz) gain phase vcc=16v, vicm=8v, g=100 rl=10k , cl=20pf, vrl=vcc/2 t=125c t=-40c t=25c phase () 1 10 100 1000 10000 -40 -20 0 20 40 -250 -200 -150 -100 -50 0 50 100 150 200 250 gain (db) frequency (khz) gain phase vcc=16v, vicm=0.5v, g=100 rl=10k , cl=20pf, vrl=vcc/2 t=125c t=-40c t=25c phase () figure 18. bode diagram at v cc = 16 v with high common mode voltage figure 19. bode diagram at v cc = 16 v and r l = 10 k , c l = 47 pf 1 10 100 1000 10000 -40 -20 0 20 40 -250 -200 -150 -100 -50 0 50 100 150 200 250 gain (db) frequency (khz) gain phase vcc=16v, vicm=15.5v, g=100 rl=10k , cl=20pf, vrl=vcc/2 t=125c t=-40c t=25c phase () 1 10 100 1000 10000 -40 -20 0 20 40 -250 -200 -150 -100 -50 0 50 100 150 200 250 gain (db) frequency (khz) gain phase vcc=16v, vicm=8v, g=100 rl=10k , cl=47pf, vrl=vcc/2 t=125c t=-40c t=25c phase ()
electrical characteristics TSX9291, tsx9292 14/31 docid024568 rev 4 figure 20. bode diagram at v cc = 16 v and r l = 2 k , c l = 20 pf figure 21. slew rate vs. supply voltage and temperature 1 10 100 1000 10000 -40 -20 0 20 40 -250 -200 -150 -100 -50 0 50 100 150 200 250 gain (db) frequency (khz) gain phase vcc=16v, vicm=8v, g=100 rl=2.2k , cl=20pf, vrl=vcc/2 t=125c t=-40c t=25c phase () 4.0 4.0 5.0 6.0 6.0 7.0 8.0 8.0 9.0 10.0 10.011.012.0 12.013.014.0 14.015.016.0 16.0 -30 -20 -20 -10 0 0 10 20 20 30 sr positive t=-40c t=25c vicm=vrl=vcc/2 rl=10k , cl=20pf vin from 0.5v to vcc-0.5v t=125c sr negative slew rate (v/s) vcc (v) figure 22. small signal overshoot vs capacitive load without feedback capacitor cf figure 23. small step response with g = +2 10 100 0 0 10 20 20 30 40 40 50 60 60 70 80 80 vcc=16v, 100mvpp, g=-1; rf=rg=1k rl=10k overshoot (%) load capacitance (pf) -400.0n 0.0 400.0n 800.0n 1.2 -0.15 -0.10 -0.10 -0.05 0.00 0.00 0.05 0.10 0.10 0.15 vcc = 16v rl=10k ;cl=20pf g=2; rf=rg=1k t=25c output voltage (v) time (s) figure 24. small step response with feedback capacitor figure 25. large step response -400.0n 0.0 400.0n 800.0n 1.2 -0.15 -0.10 -0.10 -0.05 0.00 0.00 0.05 0.10 0.10 0.15 cf=12pf cf=8pf cf=5pf cf=0pf vcc = 16v rl=10k ;cl=20pf g=-1; rf=rg=1k t=25c output voltage (v) time (s) -400.0n 0.0 400.0n 800.0n 1.2 -3.00 -2.00 -2.00 -1.00 0.00 0.00 1.00 2.00 2.00 3.00 vcc = 16v rl=10k ;cl=20pf g=-1; rf=rg=1k t=25c output voltage (v) time (s)
docid024568 rev 4 15/31 TSX9291, tsx9292 electrical characteristics 31 figure 26. desaturation time figure 27. peaking close loop with different rl 0 2 4 6 8 10 12 14 16 18 20 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 -15 -10 -5 0 5 10 15 input signal (v) time (s) input signal vcc=16v, vicm=8v, g=11 rl=10k , cl=20pf output signal (v) 1k 10k 100k 1m 10m -30 -20 -10 0 10 20 rl=2k vcc=4.5v to 16v vicm=vcc/2 rf=rg=1k gain=-1 cl=20pf rl=10k gain (db) frequency (hz) figure 28. output impedance vs frequency in close loop configuration figure 29. noise vs. frequency with 16 v supply voltage 100 1k 10k 100k 1m 10m 0.01 0.1 1 10 100 1000 vcc=16v vicm=8v osc level=30mv rms g=1 ta=25 c output impedance ( ) frequency (hz) 10 100 1k 10k 0 100 200 300 400 500 600 equivalent input voltage noise (nv/vhz) frequency (hz) vicm=15.5v vicm=0.5v vicm=8v vcc=16v t=25c figure 30. 0.1 to 10 hz noise with 16 v supply voltage figure 31. thd+n vs. frequency at v cc = 16 v 0246810 -6 -4 -2 0 2 4 6 vcc=16v vicm=8v t=25c input voltage noise (v) time (s) 100 1k 10k 100k 10 -4 10 -3 10 -2 10 -1 rl=2k vcc=16v vicm=vcc/2 vin=2vrms gain=2 bw=80khz rl=600 rl=10k thd + n (%) frequency (hz)
electrical characteristics TSX9291, tsx9292 16/31 docid024568 rev 4 figure 34. crosstalk vs. frequency between operators on tsx9292 at v cc = 16 v figure 32. thd+n vs. output voltage at v cc = 16 v figure 33. power supply rejection ratio (psrr) vs. frequency 0.1 1 10 10 -4 10 -3 10 -2 10 -1 10 0 rl=600 vcc=16v vicm=vcc/2 f=1khz gain=2 bw=22khz rl=2k rl=10k thd + n (%) output voltage (vrms) 100 1k 10k 100k 1m 0 -20 -40 -60 -80 -100 -120 -psrr +psrr vcc=16v, vicm=8v, g=1 rl=10k , cl=20pf, vripple=100mvpp psrr (db) frequency (hz) 1k 10k 100k 1m 10m -180 -160 -140 -120 -100 -80 -60 -40 -20 0 ch2 to ch1 ch1 to ch2 vcc=16v vicm=vcc/2 rl=10k cl=20pf vout=3.5vrms crosstalk (db) frequency (hz)
docid024568 rev 4 17/31 TSX9291, tsx9292 application information 31 4 application information 4.1 operating voltages the tsx929x series of operation amplifiers c an operate from 4 v to 16 v. parameters are fully specified at 4.5 v, 10 v, and 16 v power supplies. however, parameters are very stable in the full v cc range. additionally, the main specif ications are guaranteed in the extended temperature range of -40 to +125 c. 4.2 rail-to-rail input the TSX9291 and tsx9292 are designed with two complementary pmos and nmos input differential pairs. the devices have a rail-to-rail input and the input common mode range is extended from (v cc- ) - 0.1 v to (v cc+ ) + 0.1 v. however, the performance of these devices is clearly optimized for the pmos diff erential pairs (which means from (v cc- ) - 0.1 v to (v cc+ ) - 2 v). beyond (v cc+ ) - 2 v, the operational amplifiers are still functional but with downgraded performances (see figure 19 ). performances are still suit able for a large number of applications requiring the rail-to-rail input feature. TSX9291 and tsx9292 are designed to prevent phase reversal. 4.3 input pin voltage range the tsx929x series has internal esd diode protection on the inputs. these diodes are connected between the input and each supply rail to protect mosfets inputs from electrostatic discharges. thus, if the input pin voltage exceeds the power supply by 0.5 v, the esd diodes become conductive and excessive current could flow through them. to prevent any permanent damage, this current must be limited to 10 ma. this can be done by adding a resistor, rs, in series with the input pin ( figure 35 ). the rs resistor value has to be calculated for a 10 ma current limitation on the input pins. figure 35. limiting input current with a series resistor 9 lq 5v 9 rxw 9 76; *$06&% 5j 5i
application information TSX9291, tsx9292 18/31 docid024568 rev 4 4.4 stability for gain = -1 TSX9291 and tsx9292 can be used in gain = -1 configuration (see figure 36 ). however some precautions must be taken regarding the sett ing of the rg and rf resistors. effectively, the input capacitance of the tsx929x series creates a pole with rf and rg. in high frequency, this pole decreases the phase marg in and also causes gain peaking. this effect has a direct impact on the stability. figure 37 shows the peaking, depending on the values of the gain and feedback resistances. figure 36. configuration for gain = -1 figure 37. close loop gain vs. frequency ? cf rf rg vin vout c l =20pf r l =10k o + \ +vcc -vcc 1k 10k 100k 1m 10m -30 -20 -10 0 10 20 rf=rg=20k rf=rg=10k vcc=16v vicm=vcc/2 gain=-1 rl=10k cl=20pf rf=rg=1k gain (db) frequency (hz)
docid024568 rev 4 19/31 TSX9291, tsx9292 application information 31 whenever possible, it is best to choose smalle r feedback resistors. it is recommended to use 1 k ? gain and feedback resistance (rf and rg) when gain = -1 is necessary. in the application, if a large value of rf and rg ha s to be used, a feedback capacitance can be added in parallel with rf, to redu ce or eliminate the gain peaking. additionally, cf helps to compensate the input capacita nce and to increase stability. figure 38 shows how cf reduces the gain peaking. figure 38. close loop gain vs. frequency with capacitive compensation 4.5 input offset voltage drift over temperature the maximum input voltage drift over the temperature variation is defined as the offset variation related to offset value measured at 25 c. the operational amplifier is one of the main circuits of the signal conditioning chai n, and the amplifier input offset is a major contributor to the chain accuracy. the signal chain accuracy at 25 c can be compensated during production at application level. the ma ximum input voltage drift over temperature enables the system designer to anticipate the effect of temperature variations. the maximum input voltage drift over temperature is computed using equation 1 . equation 1 with t = -40 c and 125 c. the datasheet maximum value is guaranteed by a measurement on a representative sample size ensuring a c pk (process capability in dex) greater than 2. 1k 10k 100k 1m 10m -30 -20 -10 0 10 20 cf=1.5pf cf=1pf vcc=16v vicm=vcc/2 gain=-1 rf=rg=10k rl=10k cl=20pf cf=0pf gain (db) frequency (hz) v io t ----------- - max v io t () v io 25 c () ? t25 c ? --------------------------------------------------- =
application information TSX9291, tsx9292 20/31 docid024568 rev 4 4.6 long-term input of fset voltage drift to evaluate product reliability, two ty pes of stress acceleration are used: ? voltage acceleration, by changing the applied voltage ? temperature acceleration, by changing the die temperature (below the maximum junction temperature allowed by the technology) with the ambient temperature. the voltage acceleration has been defined bas ed on jedec results, and is defined using equation 2 . equation 2 where: a fv is the voltage acceleration factor is the voltage acceleration constant in 1/v, constant technology parameter ( = 1) v s is the stress voltage used for the accelerated test v u is the voltage used for the application the temperature acceleration is driven by the arrhenius model, and is defined in equation 3 . equation 3 where: a ft is the temperature acceleration factor e a is the activation energy of the technology based on the failure rate k is the boltzmann constant (8.6173 x 10 -5 ev.k -1 ) t u is the temperature of the die when v u is used (k) t s is the temperature of the die under temperature stress (k) the final acceleration factor, a f , is the multiplication of the voltage acceleration factor and the temperature acceleration factor ( equation 4 ). equation 4 a f is calculated using the temperature and volt age defined in the mission profile of the product. the a f value can then be used in equation 5 to calculate the number of months of use equivalent to 1000 hours of reliable stress duration. a fv e v s v u ? () ? = a ft e e a k ------ 1 t u ------ 1 t s ------ ? ?? ?? ? = a f a ft a fv =
docid024568 rev 4 21/31 TSX9291, tsx9292 application information 31 equation 5 to evaluate the op-amp reliability, a fo llower stress conditio n is used where v cc is defined as a function of the maximum operating voltage and the absolute maximum rating (as recommended by jedec rules). the v io drift (in v) of the product after 1000 h of stress is tracked with parameters at different measurement conditions (see equation 6 ). equation 6 the long-term drift parameter ( v io ), estimating the reliability pe rformance of the product, is obtained using the ratio of the v io (input offset voltage value) dr ift over the square root of the calculated number of months ( equation 7 ). equation 7 where v io drift is the measured drift value in the specified test conditions after 1000 h stress duration. 4.7 capacitive load driving a large capacitive load can cause st ability issues. increasing the load capacitance produces gain peaking in the frequency respon se, with overshooting and ringing in the step response. it is usually considered that with a gain peaking higher than 2.3 db the op-amp might become unstable. generally, the unity gain configuration is the wo rst configuration for stability and the ability to driv e large capacitive loads. figure 39 shows the serial resistor (riso) that must be added to the output, to make the system stable. figure 40 shows the test configuration for riso. months a f 1000 h 12 months 24 h 365.25 days () ? = v cc maxv op with v icm v cc 2 ? == v io v io drift months () ------------------------------ =
application information TSX9291, tsx9292 22/31 docid024568 rev 4 figure 39. stability criteria with a serial resistor figure 40. test configuration for riso 0.01 0.1 1 10 100 10 100 stable vcc=16v, vicm=8v, t=25c, rl=10 k g=-1, rf=rg=1k unstable serial resistor (ohm) capacitive load (nf) & ordg 9 ,1 9 5lvr *$06&% 9 n? 5j 5i
docid024568 rev 4 23/31 TSX9291, tsx9292 application information 31 4.8 high side current sensing TSX9291 and tsx9292 rail to rail input devices can be used to measure a small differential voltage on a high side shunt resistor and translat e it into a ground referenced output voltage. the gain is fixed by external resistance. figure 41. high side current sensing configuration v out can be expressed as shown in equation 8 . equation 8 assuming that r f2 = r f1 = r f and r g2 = r g1 = r g , equation 8 can be simplified as equation 9 . equation 9 with the tsx929x series, the high side current measurement must be made by respecting the common mode voltage of the amplifier: (v cc- ) - 0.1v to (v cc+ ) + 0.1v. if the application requires a higher common voltage, please refer to the tsc high side current sensing family. 5i , s 76; 9 287 9 , q 5i 5j 5j 9 5 vkxqw & ordg *$06&% , v out r shunt i1 r g2 r g2 r f2 + ------------------------ - ? ? 1 r f1 r g1 --------- - + ?? ?? ? ? ? i p r g2 r f2 r g2 r f2 + ------------------------ - ?? ?? 1 r f1 r g1 --------- - + ?? ?? i n xr f1 v io 1 r f1 r g1 --------- - + ?? ?? ? ? + = v out r shunt i r f r g ------ - ? ? ? ? v io 1 r f r g ------ - + ?? ?? ? r f i io + =
application information TSX9291, tsx9292 24/31 docid024568 rev 4 4.9 high speed photodiode the tsx929x series is an excellent choice for current to voltage (i-v) conversions. due to the cmos technology, the input bias currents are extremely low. moreover, the low noise and high unity-gain bandwidth of TSX9291 tsx9292 make them particularly suitable for high-speed photodiode preamplifier applications. the photodiode is considered as a capacitive current source. the input capacitance, c in , includes the parasitic input common mode capacitance, c cm (3pf), and the input differential mode capacitance, c diff (8pf). c in acts in parallel with the in trinsic capacitance of the photodiode, c d . at higher frequencies, the capacitors affect the circuit response. the output capacitance of a current sensor has a strong effect on the st ability of the op -amp feedback loop. c f stabilizes the gain and limits the transimp edance bandwidth. to ensure good stability and to obtain good noise performance, c f can be set as shown in equation 10 . equation 10 where, ? c in = c cm + c diff = 11 pf ? c diff is the differential input capacitance: 8 pf typical ? c cm is the common mode input capacitance: 3 pf typical ? c d is the intrinsic capacitance of the photodiode ? c smr is the parasitic capacitance of the surface mount r f resistor: 0.2 pf typical ? f gbp is the gain bandwidth product: 10 mhz at 16 v r f fixes the gain as shown in equation 11 . equation 11 figure 42. high speed photodiode c f c in c d + 2 r f f gbp ?? ? ------------------------------------------------- - c smr ? > v out r f i d = 9 287 9 && *$06&% 9 && 5 ) & ) & lq & ' * % 1ipupejpef
docid024568 rev 4 25/31 TSX9291, tsx9292 package information 31 5 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions a nd product status are available at: www.st.com . ecopack ? is an st trademark.
package information TSX9291, tsx9292 26/31 docid024568 rev 4 5.1 sot23-5 package mechanical data figure 43. sot23-5 package mechanical drawing table 7. sot23-5 package mechanical data ref. dimensions millimeters inches min. typ. max. min. typ. max. a 0.90 1.20 1.45 0.035 0.047 0.057 a1 0.15 0.006 a2 0.90 1.05 1.30 0.035 0.041 0.051 b 0.35 0.40 0.50 0.013 0.015 0.019 c 0.09 0.15 0.20 0.003 0.006 0.008 d 2.80 2.90 3.00 0.110 0.114 0.118 d1 1.90 0.075 e 0.95 0.037 e 2.60 2.80 3.00 0.102 0.110 0.118 f 1.50 1.60 1.75 0.059 0.063 0.069 l 0.10 0.35 0.60 0.004 0.013 0.023 k0 10 0 10
docid024568 rev 4 27/31 TSX9291, tsx9292 package information 31 5.2 dfn8 2x2 pack age information figure 44. dfn8 2x2 package mechanical drawing table 8. dfn8 2x2 package mechanical data ref. dimensions millimeters inches min. typ. max. min. typ. max. a 0.70 0.75 0.80 0.028 0.030 0.031 a1 0.00 0.02 0.05 0.000 0.001 0.002 b 0.15 0.20 0.25 0.006 0.008 0.010 d 2.00 0.079 e 2.00 0.079 e 0.50 0.020 l 0.045 0.55 0.65 0.018 0.022 0.026 n8 h / %277209,(: 3lq,' 3,1,1'(;$5($ ( & $ $ 3/$1( 6($7,1* 7239,(: & & [ [ ' 3,1,1'(;$5($ esofv & & $ % % $ & 6,'(9,(: *$06&%
package information TSX9291, tsx9292 28/31 docid024568 rev 4 5.3 miniso8 package information figure 45. miniso8 package mechanical drawing table 9. miniso8 package mechanical data ref. dimensions millimeters inches min. typ. max. min. typ. max. a 1.1 0.043 a1 0 0.15 0 0.006 a2 0.75 0.85 0.95 0.030 0.033 0.037 b 0.22 0.40 0.009 0.016 c 0.08 0.23 0.003 0.009 d 2.80 3.00 3.20 0.11 0.118 0.126 e 4.65 4.90 5.15 0.183 0.193 0.203 e1 2.80 3.00 3.10 0.11 0.118 0.122 e 0.65 0.026 l 0.40 0.60 0.80 0.016 0.024 0.031 l1 0.95 0.037 l2 0.25 0.010 k 0 8 0 8 ccc 0.10 0.004
docid024568 rev 4 29/31 TSX9291, tsx9292 package information 31 5.4 so8 package information figure 46. so8 package mechanical drawing table 10. so8 package mechanical data ref. dimensions millimeters inches min. typ. max. min. typ. max. a1.750.069 a1 0.10 0.25 0.004 0.010 a2 1.25 0.049 b 0.28 0.48 0.011 0.019 c 0.17 0.23 0.007 0.010 d 4.80 4.90 5.00 0.189 0.193 0.197 e 5.80 6.00 6.20 0.228 0.236 0.244 e1 3.80 3.90 4.00 0.150 0.154 0.157 e 1.27 0.050 h 0.25 0.50 0.010 0.020 l 0.40 1.27 0.016 0.050 l1 1.04 0.040 k 0 8 1 8 ccc 0.10 0.004
ordering information TSX9291, tsx9292 30/31 docid024568 rev 4 6 ordering information 7 revision history table 11. order codes order code temperature range package packing marking TSX9291ilt -40 c to +125 c sot23-5 tape and reel k28 TSX9291iylt (1) 1. qualified and characterized according to aec q100 and q003 or equivalent, advanced screening according to aec q001 & q 002 or equivalent. k209 tsx9292iq2t dfn8 2x2 k28 tsx9292ist miniso8 tsx9292idt so8 tsx9292i tsx9292iydt (1) sx9292iy table 12. document revision history date revision changes 24-apr-2013 1 initial release 01-jul-2013 2 added the dual version op-amp (tsx9292) and updated the datasheet accordingly. added the silhouettes, pin connections, and package information for dfn8 2x2, miniso8, and so8; updated table 2 . added figure 34 . 10-dec-2013 3 added long-term input offset voltage drift parameter in table 4 , ta ble 5 , and table 6 . added section 4.5: input offset voltage drift over temperature in section 4: application information . added section 4.6: long-term input offset voltage drift in section 4: application information . corrected figure 15: bode diagram vs. temperature for vcc = 10 v . 28-apr-2014 4 table 4 , ta ble 5 , and table 6 : updated phase margin condition for the gain parameter. section 4.3: input pin voltage range : added information concerning an rs resistor; updated figure 35 . table 11 : updated markings of order codes TSX9291iylt and TSX9291iq2t.
docid024568 rev 4 31/31 TSX9291, tsx9292 31 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems wi th product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ?automotive, automotive safety or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2014 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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